SVG Picture created as 65816-computer-CPU& Bank Address Latching.svg date 2022/05/29 19:47:21 Picture generated by Eeschema-SVG NCNC11GNDGND44OUTOUT55VccVcc88X2X2MXO45HSMXO45HS R6R61 k1 kGNDGND+5V+5V NCNC11GNDGND44OUTOUT55VccVcc88X1X1MXO45HSMXO45HS R5R51 k1 kGNDGND D2D2PWRPWR+5V+5V+5V+5VGNDGND1122J1J1EXT_LED_PWREXT_LED_PWRSW1SW1SW_RESSW_RES R7R710 k10 k R8R810 k10 k R10R1010 k10 k R9R910 k10 k+5V+5V R2R23.3 k3.3 kGNDGNDC15C15100 µF100 µF C13C130.1 µF0.1 µF+5V+5V R1R13.3 k3.3 k+5V+5V ~{R}~{R}11DD22CC33~{S}~{S}44QQ55~{Q}~{Q}66U10AU10A74AC7474AC74TP1TP1CLKCLK112233445566J14J14Conn_01x06Conn_01x06 R3R33.3 k3.3 k+5V+5VGNDGNDTP2TP2X2_OUTX2_OUTGNDGND+5V+5VTP11TP11X1_OUTX1_OUTGNDGNDTP6TP6~{NMI}~{NMI}+5V+5V ~{S}~{S}1010CC1111DD1212~{R}~{R}1313~{Q}~{Q}88QQ99U10BU10B74AC7474AC74+5V+5V VCCVCC1414GNDGND77U10CU10C74AC7474AC74GNDGND+5V+5V1122JP4JP4Jumper_2_BridgedJumper_2_BridgedTP5TP5~{IRQ}~{IRQ} R11R1110 k10 k1122334455667788J10J10Conn_01x08Conn_01x08+5V+5V1122JP5JP5SolderJumper_2_OpenSolderJumper_2_Open ~{RESET}~{RESET}11VCCVCC22GNDGND33U14U14DS1813-5+DS1813-5+GNDGNDGNDGND R17R171 k1 k D3D3EMUEMU R4R41 k1 kGNDGND+5V+5V1122334455667788J8J8Conn_01x08Conn_01x08GNDGND1122334455667788J9J9Conn_01x08Conn_01x08 ~{RST}~{RST}11GNDGND22RSTRST33~{MR}~{MR}44VDDVDD55U5U5MIC2775MIC27751122J2J2EXT_SW_RESEXT_SW_RESTP3TP3RESRESGNDGND D1D1RESRESGNDGNDTP4TP4~{RES}~{RES}112233445566J13J13Conn_01x06Conn_01x06 R12R1210 k10 k R14R1410 k10 k R13R1310 k10 kPWR_FLAGPWR_FLAGTP7TP7GNDGNDTP10TP10GNDGNDTP8TP8GNDGND H1H1+5V+5V C5C50.1 µF0.1 µF H2H2+5V+5V ~{VP}~{VP}11RDYRDY22A15A152525~{ABORT}~{ABORT}33PHI2PHI23737MXMX3838VDAVDA3939~{IRQ}~{IRQ}44~{RES}~{RES}4040~{ML}~{ML}55~{NMI}~{NMI}66VPAVPA77A1A11010A2A21111A3A31212A4A41313A5A51414A6A61515A7A71616A8A81717A9A91818A10A101919A11A112020VSSVSS2121A12A122222A13A132323A14A142424D7D72626D6D62727D5D52828D4D42929D3D33030D2D23131D1D13232D0D03333~{RW}~{RW}3434EE3535BEBE3636VDDVDD88A0A099U4U4W65C816SW65C816S C1C10.1 µF0.1 µF112233JP2JP2CLK_SELCLK_SELGNDGNDGNDGND H3H3 H4H4+5V+5VPWR_FLAGPWR_FLAG1122J3J3PowerPower+5V+5V C3C30.1 µF0.1 µF+5V+5VTP9TP9GNDGND11223344J11J11Conn_01x04Conn_01x04 C4C40.1 µF0.1 µFA->BA->B11GNDGND1010B7B71111B6B61212B5B51313B4B41414B3B31515B2B21616B1B11717B0B01818CECE1919A0A022VCCVCC2020A1A133A2A244A3A355A4A466A5A577A6A688A7A799U2U274AC24574AC245 OEOE11GNDGND1010LoadLoad1111Q7Q71212Q6Q61313Q5Q51414Q4Q41515Q3Q31616Q2Q21717Q1Q11818Q0Q01919D0D022VCCVCC2020D1D133D2D244D3D355D4D466D5D577D6D688D7D799U3U374AC57374AC573 C2C20.1 µF0.1 µF+5V+5V CLK_INVCLK_INV D[0..7]D[0..7] A[0..19]A[0..19] CLK_UARTCLK_UART ~{NMI}~{NMI} ~{RES}~{RES} RESRES CLKCLK ~{RW}~{RW} VDAVDA VPAVPA A11A11 D4D4 A12A12 ~{ABORT}~{ABORT} DB5DB5 A10A10 A14A14 A[0..19]A[0..19] A2A2 A0A0 A17A17 A16A16 D[0..7]D[0..7] CLK_INVCLK_INV DB6DB6 D[0..7]D[0..7] A13A13 DB4DB4 D0D0 D[0..7]D[0..7] DB3DB3 A1A1 D1D1 D3D3 D2D2 DB1DB1 ~{RES}~{RES} D5D5 DB6DB6 DB1DB1 DB[0..7]DB[0..7] DB0DB0 ~{RES_BTN}~{RES_BTN} DB0DB0 EMUEMU DB7DB7 DB2DB2 ~{IRQ}~{IRQ} ~{NMI}~{NMI} DB2DB2 ~{RES}~{RES} EMUEMU D1D1 BEBE ~{NMI}~{NMI} DB7DB7 D0D0 ~{RES_BTN}~{RES_BTN} RDYRDY ~{VP}~{VP} A[0..19]A[0..19] ~{RES}~{RES} D7D7 D6D6 DB3DB3 DB5DB5 DB4DB4 RESRES ~{ML}~{ML} A1A1 CLKCLK ~{NMI}~{NMI} ~{IRQ}~{IRQ} A12A12 RDYRDY BEBE A15A15 MXMX CLKCLK CLK_INVCLK_INV DB4DB4 A0A0 CLK_INVCLK_INV ~{RW}~{RW} D7D7 D3D3 D2D2 VDAVDA A3A3 D5D5 A17A17 A6A6 A8A8 A9A9 A[0..19]A[0..19] DB7DB7 DB6DB6 DB5DB5 DB[0..7]DB[0..7] A19A19 A6A6 ~{RES}~{RES} ~{ABORT}~{ABORT} DB2DB2 DB0DB0 DB1DB1 DB3DB3 A16A16 A18A18 A11A11 A9A9 VPAVPA ~{RW}~{RW} A3A3 A5A5 D7D7 A8A8 A10A10 MXMX D6D6 VDAVDA A4A4 D1D1 D3D3 D2D2 A7A7 D5D5 D0D0 D4D4 A15A15 D4D4 A2A2 A14A14 A13A13 A4A4 D6D6 A7A7 A19A19 A18A18 VPAVPA ~{ML}~{ML} EMUEMU ~{VP}~{VP} ~{RW}~{RW} A5A5 DecouplingDecoupling Emulation LEDEmulation LED Unused flip-flopUnused flip-flop MicroprocessorMicroprocessor External IRQ input,External IRQ input,connect to VCC if not usedconnect to VCC if not used Optional data bus pull-upOptional data bus pull-up Power-on resetPower-on reset On-board and (optional) external power LEDOn-board and (optional) external power LED Demux DB[0..7] into data bus D[0..7] and bank address A[16..19]Demux DB[0..7] into data bus D[0..7] and bank address A[16..19] Alternative, bridge jumper if usedAlternative, bridge jumper if used ClockClock Mounting holesMounting holes Power inputPower input Expansion headersExpansion headers